`timescale 1ns/1ps

//----------Basic Parameters----------//
`define    XLEN                                                64
`define    MXLEN                                               64
`define    BUSLEN                                              64
`define    INSTLEN                                             32
`define    REGFILE_ADDR_LEN                                    5
`define    CSR_ADDR_LEN                                        12
`define    PC_START                                            64'h00000000_80000000 
`define    ZERO_WORD                                           64'h00000000_00000000

//----------Instruction Types----------//
`define    R_TYPE                                              5'b011?0
`define    B_TYPE                                              5'b11000
`define    S_TYPE                                              5'b01000
`define    J_TYPE                                              5'b11011
`define    U_TYPE                                              5'b0?101
`define    PRIVILEGED                                          5'b11100

//----------Immediate Extension Types----------//
`define    IMM_I_S_EXT                                         3'b000
`define    IMM_I_S_W_EXT                                       3'b001 
`define    IMM_I_NS_EXT                                        3'b010
`define    IMM_B_EXT                                           3'b011
`define    IMM_S_EXT                                           3'b100
`define    IMM_U_EXT                                           3'b101 
`define    IMM_J_EXT                                           3'b110
`define    IMM_NOEXT                                           3'b111

//----------ALU Oprend A Sources----------//
`define    PC                                                  2'b00
`define    REGBUS_A                                            2'b01
`define    ZEXT_BITSEL_REGBUS_A                                2'b10
`define    SEXT_BITSEL_REGBUS_A                                2'b11

//----------ALU Oprend B Sources----------//
`define    REGBUS_B                                            2'b10
`define    IMM                                                 2'b00
`define    CONST_4                                             2'b01
`define    ZEXT_BITSEL_REGBUS_B                                2'b11

//----------ALU Operation Types----------//
`define    ADD_OP                                              3'b000
`define    SUB_OP                                              3'b001
`define    AND_OP                                              3'b010
`define    OR_OP                                               3'b011
`define    XOR_OP                                              3'b100
`define    SLL_OP                                              3'b101
`define    SRL_OP                                              3'b110
`define    SRA_OP                                              3'b111

//----------PSW Flags----------//
`define    CF                                                  psw_flags[0]
`define    SF                                                  psw_flags[1]
`define    OF                                                  psw_flags[2]
`define    ZF                                                  psw_flags[3]

//----------Branch Types----------//
`define    NOTBRANCH                                           3'b010
`define    EQ                                                  3'b000
`define    NE                                                  3'b001
`define    LT                                                  3'b100
`define    GE                                                  3'b101
`define    LTU                                                 3'b110
`define    GEU                                                 3'b111

//----------Load Extension Types----------//
`define    SEXT8                                               3'b000
`define    SEXT16                                              3'b001
`define    SEXT32                                              3'b010
`define    ZEXT8                                               3'b100
`define    ZEXT16                                              3'b101
`define    ZEXT32                                              3'b110
`define    NOEXT                                               3'b011

//----------Advanced eXtensible Interface----------//
// Width Parameters
`define    AXI_ADDR_WIDTH                                      64
`define    AXI_DATA_WIDTH                                      64
`define    RW_DATA_WIDTH                                       64
`define    AXI_ID_WIDTH                                        2
`define    AXI_USER_WIDTH                                      1

// Burst Types
`define    AXI_BURST_TYPE_FIXED                                2'b00
`define    AXI_BURST_TYPE_INCR                                 2'b01
`define    AXI_BURST_TYPE_WRAP                                 2'b10

// Access Permissions
`define    AXI_PROT_UNPRIVILEGED_ACCESS                        3'b000
`define    AXI_PROT_PRIVILEGED_ACCESS                          3'b001
`define    AXI_PROT_SECURE_ACCESS                              3'b000
`define    AXI_PROT_NON_SECURE_ACCESS                          3'b010
`define    AXI_PROT_DATA_ACCESS                                3'b000
`define    AXI_PROT_INSTRUCTION_ACCESS                         3'b100

// Memory Types (AR)
`define    AXI_ARCACHE_DEVICE_NON_BUFFERABLE                   4'b0000
`define    AXI_ARCACHE_DEVICE_BUFFERABLE                       4'b0001
`define    AXI_ARCACHE_NORMAL_NON_CACHEABLE_NON_BUFFERABLE     4'b0010
`define    AXI_ARCACHE_NORMAL_NON_CACHEABLE_BUFFERABLE         4'b0011
`define    AXI_ARCACHE_WRITE_THROUGH_NO_ALLOCATE               4'b1010
`define    AXI_ARCACHE_WRITE_THROUGH_READ_ALLOCATE             4'b1110
`define    AXI_ARCACHE_WRITE_THROUGH_WRITE_ALLOCATE            4'b1010
`define    AXI_ARCACHE_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE   4'b1110
`define    AXI_ARCACHE_WRITE_BACK_NO_ALLOCATE                  4'b1011
`define    AXI_ARCACHE_WRITE_BACK_READ_ALLOCATE                4'b1111
`define    AXI_ARCACHE_WRITE_BACK_WRITE_ALLOCATE               4'b1011
`define    AXI_ARCACHE_WRITE_BACK_READ_AND_WRITE_ALLOCATE      4'b1111

// Memory Types (AW)
`define    AXI_AWCACHE_DEVICE_NON_BUFFERABLE                   4'b0000
`define    AXI_AWCACHE_DEVICE_BUFFERABLE                       4'b0001
`define    AXI_AWCACHE_NORMAL_NON_CACHEABLE_NON_BUFFERABLE     4'b0010
`define    AXI_AWCACHE_NORMAL_NON_CACHEABLE_BUFFERABLE         4'b0011
`define    AXI_AWCACHE_WRITE_THROUGH_NO_ALLOCATE               4'b0110
`define    AXI_AWCACHE_WRITE_THROUGH_READ_ALLOCATE             4'b0110
`define    AXI_AWCACHE_WRITE_THROUGH_WRITE_ALLOCATE            4'b1110
`define    AXI_AWCACHE_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE   4'b1110
`define    AXI_AWCACHE_WRITE_BACK_NO_ALLOCATE                  4'b0111
`define    AXI_AWCACHE_WRITE_BACK_READ_ALLOCATE                4'b0111
`define    AXI_AWCACHE_WRITE_BACK_WRITE_ALLOCATE               4'b1111
`define    AXI_AWCACHE_WRITE_BACK_READ_AND_WRITE_ALLOCATE      4'b1111

// Burst Length
`define    AXI_SIZE_BYTES_1                                    3'b000
`define    AXI_SIZE_BYTES_2                                    3'b001
`define    AXI_SIZE_BYTES_4                                    3'b010
`define    AXI_SIZE_BYTES_8                                    3'b011
`define    AXI_SIZE_BYTES_16                                   3'b100
`define    AXI_SIZE_BYTES_32                                   3'b101
`define    AXI_SIZE_BYTES_64                                   3'b110
`define    AXI_SIZE_BYTES_128                                  3'b111

// Burst Size
`define    SIZE_B                                              2'b00
`define    SIZE_H                                              2'b01
`define    SIZE_W                                              2'b10
`define    SIZE_D                                              2'b11

//----------Privileged Part----------//
// Priv Mode
`define    RISCV_PRIV_MODE_U                                   0
`define    RISCV_PRIV_MODE_S                                   1
`define    RISCV_PRIV_MODE_M                                   3

// CSR Bits
`define    MIP_MTIP                                            7
`define    MIE_MTIE                                            7
`define    MSTATUS_MIE                                         3
`define    MSTATUS_MPIE                                        7
`define    MSTATUS_MPP                                         12:11

// Mcause Exception Codes
`define    ecall_from_m_mode                                   64'hb
`define    machine_timer_interrupt                             64'h80000000_00000007

// CSR Address
`define    mtime_addr                                          64'h200BFF8
`define    mtimecmp_addr                                       64'h2004000
`define    mhartid_addr                                        12'hF14
`define    mstatus_addr                                        12'h300
`define    mie_addr                                            12'h304
`define    mtvec_addr                                          12'h305
`define    mscratch_addr                                       12'h340
`define    mepc_addr                                           12'h341
`define    mcause_addr                                         12'h342
`define    mtval_addr                                          12'h343                   /* Not Implemented */
`define    mip_addr                                            12'h344
`define    mcycle_addr                                         12'hB00
`define    minstret_addr                                       12'hB02
`define    mtimefreq_addr                                      12'hBFF
